Monolithic integrated threshold switch

ABSTRACT

This invention relates to a monolithically integrated threshold switch which switches on at an upper voltage value of a hysteretic characteristic and switches off at a lower voltage value especially adapted to I 2  L ICs. Over a resistance the value of which determines the upper voltage value the input is fed to the base of a first transistor which has no injector nor current feeding, and to a first collector of a multicollector transistor the base of which is fed to its second collector and to a current source. Any output signal may be derived from any additional collector of one of the two transistors.

BACKGROUND OF THE INVENTION

This invention relates to a monolithic integrated threshold switch and,more particularly, to a monolithic integrated circuit of I² L design.

This design principle, the "integrated injection logic" (I² L)--cf."Philips Techn. Rev.", 33, No. 3 (1973), pp. 76 to 85--is also referredto as "merged transistor logic"--cf. "1972 IEEE InternationalSolid-State Circuits Conference", Digest of Technical Papers, pp. 90 to93. The main features of this design principle are collector regionslying at the semiconductor surface, and injectors which are common to aplurality of transistors and, as part of a lateral transistor structure,control the current flow in the vertical transistors and serve ascurrent sources. The injector can be represented in the equivalentcircuit diagram as an equivalent transistor whose base is at the emitterpotential of the respective vertical transistor, and whose collector isconnected to the base of this vertical transistor. The collector regionof the equivalent transistor is identical with the base region of thevertical transistor. For clarity, these equivalent transistorscorresponding to the injectors have been omitted in the accompanyingdrawing.

The advantages of the integrated injection logic lie in the fact thatrelatively little semiconductor surface is required, and that it is easyto realize digital circuits with multicollector transistors by thenormal planar diffusion technique without resistors and capacitors.Furthermore, no special current sources are required for thetransistors, which are supplied with current via the injectors. Since,moreover, the individual transistors can be provided with electricallyisolating regions to reduce the semiconductor surface required, it isdesirable to have circuits which can readily be combined with amonolithic integrated circuit of I² L design, particularly circuitswhose emitters are at a common potential.

SUMMARY OF THE INVENTION

The invention relates to a monolithic integrated threshold switch whichswitches on at an upper voltage value U_(o) of a hystereticinput-voltage/output-voltage characteristic, and switches off at a lowervoltage value U_(u).

It is the object of the invention to provide a circuit of a monolithicintegrated threshold switch which makes it possible to eliminateunwanted spikes in input stages of integrated circuits, particularly ofmonolithic integrated circuits of I² L design, and requires as littlesemiconductor surface as possible.

The above and other objects of the present invention will be moreclearly understood from the following detailed description taken inconjunction with the accompanying drawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the circuit of the monolithic integrated threshold switchin accordance with the invention; and

FIG. 2 shows the hysteretic input-voltage/output-voltage characteristicof the threshold switch according to the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 1 shows the monolithic integrated threshold switch according to theinvention with two multicollector transistors T₁ and T₂. The input ofthe threshold switch is connected through a resistor R to the base ofthe first transistor T₁ and to a first collector of a second transistorT₂ designed as a multicollector transistor, as shown in FIG. 1.

While the current I₁ for the first collector of the first transistor T₁comes from a first current source S₁, the base of the second transistorT₂, which base is connected to the second collector of the secondtransistor T₂ and to a second collector of the first transistor T₁,receives its current I₂ from a current source S₂. By contrast, the baseof the first transistor T₁ of the monolithic integrated threshold switchin accordance with the invention receives no current from an injector ora current source. The first transistor T₁ may be realized using I² Ltechnology; its base region, however, must not receive current from aninjector. If required, further collectors may be provided each of whichreceives the current I₁ from a current source S₁ ', S₁ ", and from eachof which an output signal U_(A).sbsb.1.spsb.', U_(A).sbsb.2 can betapped.

The monolithic integrated threshold switch provides an output signalU_(A).sbsb.1, which can be taken from the first collector of the firsttransistor T₁, from any other collector of this transistor, or from anycollector of the transistor T₂.

The transistor T₂ has an adjusted B=(I_(C) /I_(B)) of about 1, which isachieved by means of a conductive connection between its collector andits base. When a current I₂ is fed into the base of this transistor T₂,the other collectors of this transistor T₂ can assume I₂ only if I² Ltechnology is employed.

When the input voltage U_(E) at the input E rises from OV, U_(A).sbsb.1changes to the 1 state as shown in FIG. 2. It remains in this stateuntil the current I₂ is exceeded as a result of the resistor R.

Then a base current begins to flow in the transistor T₁ ; this basecurrent cuts the transistor T₂ off. Due to the feedback between thetransistor T₁ and the transistor T₂, this switching is very fast, so theoutput voltage U_(A).sbsb.1 returns to the O state. The total currentflowing through the resistor R now flows as the base current through thetransistor T₁. When the voltage across the output resistor (not shown)falls below the threshold value U_(BE), i.e. below 0.7 V, (if asemiconductor body of silicon is used), U_(A).sbsb.1 will switch back tothe 1 state.

Since the output current is not switched from 0 to 1 until the collectorcurrent I₁ of the transistor T₁ has become smaller than the current I₂of the transistor T₂, the current I₁ at the output A₁, A₁ ' or A₂ mustbe chosen to be smaller than or equal to I₂ and smaller than I₂ if cleansquare-wave pulses are to be obtained.

A more detailed description of the operation of the threshold switch ofthe present invention follows.

Since transistor T₂ represents a current mirror having a currenttransformation of 1:1, each collector of transistor T₂ comes from thesaturation state if the load current is I_(E) ≧I₂. As long as thecurrent I_(E) =[(U_(E) -U_(sat))/R]≦I₂ the collector of transistor T₂remains in the saturation state, i.e. in the logical state of 0. If thebase of transistor T₁ has the logical state of 0 (U_(E) =0), U_(A1) hasthe logical state of 1. This state of U_(A1) can only change if the baseof transistor T₁ takes the state of 1. This state, however, can only betaken by the base of transistor T₁ if U_(E) has increased to the extentthat [(U_(E) -U_(sat))/R]=I_(E) ≧I₂. In that event current I₂ is fed tothe collector of transistor T₂ and the current I_(E) -I₂ is fed to thebase of transistor T₁. Transistor T₂ becomes non-conductive. Thus,current I₂ of the current mirror transistor T₂ decreases and thereresults a feedback accelerating the turnover into the logical state ofU_(A1) =0. This feedback takes place after the voltage U_(sat) at thebase of transistor T₁ has increased to the extent of U_(sat) ≈U_(BE) ofa transistor. Thus, the upper switching threshold voltage U_(o) isdefined (see FIG. 2).

As long as U_(E) ≦R·I₂ +U_(sat), the voltage at the base of transistorT₁ remains U_(sat), since transistor T₂ is a transistor with a currentamplification of 1 and since the collectors of transistor T₂ only leavethe saturation state if their load current exceeds I₂. The condition toachieve this is (according to FIG. 1) U_(E) ≧R·I₂ +U_(sat). Accordingly,as long as U_(E) <R·I₂ +U_(sat), the logical state of 0 at the base oftransistor T₁ is maintained. (Transistor T₁ and transistor T₂ are abistable system, I₂ /I_(BT).sbsb.1 >1.)

The current I₂ is exceeded if the voltage U_(E) is such that the currentI_(E) which is fed to the junction point (base of transistor T₁--collector transistor T₂) via the resistor R exceeds I₂.

The feedback between transistor T₁ and transistor T₂ occurs at thejunctions (base of transistor T₁ --one collector of transistor T₂) and(base of transistor T₂ --another collector of transistor T₂ --onecollector of transistor T₁) (FIG. 1).

If the voltage U_(E) falls below U_(BE), then current leaks off frombase of transistor T₁ until transistor T₁ becomes non-conducting and itsbase current approaches 0. As soon as the base current of transistor T₁is .spsp.I^(BT) 1≦(I₂ /B) (if B=I₁ /I_(BT).sbsb.1 is currentamplification of transistor T₁), then transistor T₂ becomes conducting.The collector current of transistor T₂ discharges the base of transistorT₁ which attains the state of 0. This, too, is a feedback.

The input current turns transistor T₁ on, it does not turn T₂ off.Transistor T₂ is turned off by a collector of transistor T₁ (FIG. 1).

The hysteretic input-voltage/output-voltage characteristic of FIG. 2 isadjustable with respect to the upper voltage threshold value U_(o)because

    U.sub.o ≃U.sub.BE +R.I.sub.2 volts

with U_(BE) =U_(u) =0.7 V for silicon.

At a predetermined upper voltage value U_(o), the value of the resistortherefore has to be chosen according to the equation

    R=(U.sub.o -U.sub.BE)/I.sub.2

The harmless range of the amplitude ratio with respect to disturbingspikes in the input signal, within which undesired switching cannot takeplace, can thus be selected by suitable choice of the value of theresistor R and of the current I.

While the principles of this invention have been described above inconnection with specific apparatus, it is to be understood that thisdescription is made only by way of example and not as a limitation onthe scope of the invention as set forth in the objects and featuresthereof and in the accompanying claims.

What is claimed is:
 1. A monolithic integrated threshold switch whichswitches on at an upper voltage valve of a hysteretic inputvoltage/output voltage characteristic and switches off at a lowervoltage comprising:a first transistor having at least first and secondcollectors; a second transistor having a first collector coupled to thebase of said first transistor and said second transistor having a secondcollector coupled to the base of said second transistor and to saidsecond collector of said first transistor, the emitters of said firstand second transistors being coupled together; means for applying aninput current to the base of said first transistor and said firstcollector of said second transistor for turning on said first transistorwhich in turn cuts off said second transistor; first means for applyinga first current to said first collector of said first transistor; andsecond means for applying a second current to the base of said secondtransistor and said second collector of said second transistor, saidsecond transistor turning off when said input current exceeds saidsecond current.
 2. A monolithic integrated threshold switch according toclaim 1 further comprising a resistor coupled between the base of saidfirst transistor and an input voltage for developing said input current.3. A monolithic integrated threshold switch according to claim 1 whereinsaid second current is coupled to said second collector of said firsttransistor.
 4. A monolithic integrated threshold switch according toclaim 3 wherein the output of said threshold switch is tapped from anycollector of said first and second transistors.
 5. A monolithicintegrated threshold switch according to claim 4 wherein said resistorhas a value of

    R=(U.sub.o -U.sub.BE)/I.sub.2

where U_(BE) is the threshold value in the current voltagecharacteristic of the base and the emitter U_(o) is said upper voltageand I₂ is said second current.
 6. An integrated injection logic circuithaving an input terminal and an output terminal, comprising: first meansfor inverting an input signal, the first means for inverting having aninput and an output; second means for inverting a signal, the secondmeans having an input and first, second, and third outputs wherein thefirst output of the second means is connected to the input of the secondmeans and the second output is connected to the input of the firstmeans, the input of the second means being coupled to the output of thefirst means whereby the logic circuit can provide a latch function withonly one input terminal, the third output of the second means beingcoupled to the output terminal of the integrated injection logiccircuit; and a third means for providing current to the first and secondmeans.
 7. An integrated injection logic circuit, comprising: a firsttransistor having a base, an emitter, and a collector, the base of thefirst transistor serving as an input to the circuit; a second transistorhaving a base, an emitter, and a first, a second, and a third collector,the base of the second transistor being coupled to the collector of thefirst transistor, the emitter of the second transistor being coupled tothe emitter of the first transistor, the first collector being connectedto the base of the second transistor, the second collector being coupledto the input of the circuit, and the third collector serving as anoutput for the circuit; and a current source coupled to the collector ofthe first transistor.